Masterclock TCDS Series Ficha de datos Pagina 2
- Pagina / 81
- Tabla de contenidos
- MARCADORES
- Stereo CODEC with MIC/SPK 1
- ■ Block Diagram 2
- ■ Ordering Guide 3
- ■ Pin Layout 3
- PIN/FUNCTION 5
- ■ Handling of Unused Pin 6
- ABSOLUTE MAXIMUM RATINGS 7
- ANALOG CHARACTERISTICS 8
- [AK4646] 10
- FILTER CHARACTERISTICS 11
- DC CHARACTERISTICS 11
- SWITCHING CHARACTERISTICS 12
- ■ Timing Diagram 15
- PMADL bit 18
- PMADR bit 18
- SDTO 50%DVDD 18
- ■ System Clock 19
- ■ Master Mode/Slave Mode 19
- ■ PLL Mode 20
- ■ PLL Unlock State 21
- DSP or μP 22
- Don’t care 25
- ■ System Reset 27
- ■ Audio Interface Format 27
- ■ Mono/Stereo Mode 29
- ■ MIC/LINE Input Selector 30
- ■ MIC Gain Amplifier 31
- ■ MIC Power 31
- ■ Digital Block 32
- PMADL PMADR PMDAC 33
- ■ ALC Operation 38
- ■ Output Digital Volume 2 44
- ■ De-emphasis Filter 45
- ■ Soft Mute 45
- ■ Analog Mixing: Mono Input 46
- ■ Speaker Output 49
- SPK-Amp 50
- ■ Serial Control Interface 52
- ■ Register Map 53
- ■ Register Definitions 55
- MGAIN2 MGAIN0 56
- → DAC (default) 60
- Default 0 0 0 0 0 0 0 0 63
- “0000H” 64
- SYSTEM DESIGN 65
- 2. Voltage Reference 66
- 3. Analog Inputs 66
- 4. Analog Outputs 66
- ■ Clock Set up 67
- Speaker-amp Output 72
- ■ Stereo Line Output 74
- ■ Stop of Clock 75
- ■ Power down 76
- 32pin QFN (Unit: mm) 77
- MARKING (AK4646EN) 79
- MARKING (AK4646EZ) 79
- REVISION HISTORY 80
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